Chapter 4 · MCQ Read Mode

Computer Organization and Embedded System

Which control unit design generates control signals using microinstructions stored in a ROM?

The register that holds the address of the next microinstruction is the:

A horizontal microinstruction format is characterized by:

An addressing mode where the operand value is given directly in the instruction is called:

In register indirect addressing, the register contains:

A key characteristic of RISC architecture is:

Overlapping the fetch, decode, and execute stages of successive instructions is called:

A pipeline hazard caused by an instruction needing a result not yet produced by an earlier instruction is a:

A three-address instruction format specifies:

Which of these is a pipeline hazard caused specifically by branch instructions?

Subtraction is commonly performed in computers by adding the:

Booth's algorithm is primarily used to speed up:

Which level of the memory hierarchy is fastest and smallest?

Cache memory design relies mainly on the principle of:

In direct mapping, each main memory block can be placed:

Which cache replacement algorithm replaces the block that has not been used for the longest time?

In the write-through policy, a write operation updates:

Which type of memory is non-volatile and normally only readable after manufacture?

EPROM is erased using:

A memory system with L1, L2, and L3 caches illustrates:

In programmed I/O, the CPU:

Which I/O mode allows the CPU to do other work while waiting for a device, using a signal from the device?

DMA (Direct Memory Access) transfers data:

A multiprocessor system in which all processors share a common main memory is called:

Loosely coupled multiprocessor systems typically communicate using:

Which interconnection structure directly connects every processor to every memory module with dedicated paths?

An I/O module's function does NOT typically include:

Synchronization between processes in a shared-memory multiprocessor is commonly done using:

Compared to programmed I/O, DMA is generally:

A hypercube is an example of a:

An embedded system is best described as:

A real-time system where missing a deadline is considered a system failure is called:

A processor whose instruction set is customized for a particular application domain (e.g., DSP) is called:

A single-purpose processor, compared to a GPP, is typically:

In a custom single-purpose processor, the component that performs the actual data operations is the:

The component that sequences the operations of a custom processor's datapath is the:

Optimizing a custom single-purpose processor design typically targets:

The fetch-decode-execute cycle describes the basic operation of:

An embedded system classified by scale as using a single 8/16-bit microcontroller is a:

A typical embedded software development environment includes:

A thread differs from a process mainly because a thread:

Multiple CPUs executing different processes at the same time is called:

Which scheduling algorithm assigns fixed priorities to periodic tasks based on their period (shorter period = higher priority)?

Earliest Deadline First (EDF) is a:

Which mechanism is commonly used to prevent race conditions between concurrent tasks?

A device driver's main role is to:

In an open-loop control system:

A thermostat-controlled heating system is an example of a:

Round robin scheduling gives each task:

Which of these is classified as a hard real-time requirement?

VHDL stands for:

In a VHDL design, the part that declares the circuit's input/output ports is the:

A VHDL description that specifies what a circuit does using processes, without detailing gate-level structure, uses which modeling style?

Combinational logic in VHDL is typically modeled using:

Sequential logic in VHDL is typically triggered using:

Pipelining in a VHDL design is implemented by:

Which level of IC integration has the fewest transistors per chip?

Modern microprocessors with hundreds of thousands to millions of transistors belong to which integration level?

CMOS technology is favored for digital ICs mainly because of its:

An overflow condition in VHDL arithmetic occurs when:

Which feature of IPv6 is NOT supported (unlike IPv4)?

What is the maximum length of a hostname?

Which OSI layer is responsible for process-to-process (end-to-end) communication?

Which cable type is used to directly connect two routers without a switch?

In hierarchical routing, each autonomous domain (cluster) is called a:

FTP uses how many TCP connections?

Heavy network traffic that slows down response time is called:

The default port number for HTTP is:

Which protocol is used for sending email from a client to a mail server?

What is the loopback address in IPv4?

What is the network address of 192.10.16.32 with subnet mask /25?

What is the Network ID of 203.17.10.7 with a /24 subnet mask?

Which function is NOT performed at the Transport Layer?

CDMA technology allows multiple users to:

A packet filter firewall operates at which OSI layer?

The most time-critical real-time network application is:

A proxy server is implemented at which OSI layer?

The correct order of network types from smallest to largest geographic scope is:

The RIP routing protocol uses which metric to determine the best path?

In RIP, a hop count of 16 means:

The IEEE standard for Ethernet is:

Distance vector routing protocols use which algorithm to compute shortest paths?

10Base5 Ethernet supports a maximum segment length of:

A typical LAN covers a geographic scope of up to: