Chapter 8 · MCQ Read Mode

Digital Electronics, Microprocessors and Signal Processing for BME

Which two gates are described as universal gates?

The output of an exclusive-OR gate is 1 when:

According to De Morgan's theorem, the complement of (A + B) is:

The Boolean expression A + A'B simplifies to:

The expression AB + A'C + BC simplifies to AB + A'C by which theorem?

In a Karnaugh map, the rows and columns are labelled in Gray code so that:

A group of eight adjacent ones in a four-variable Karnaugh map eliminates how many variables?

In Karnaugh map simplification, don't-care conditions:

Which of the following statements about a four-variable Karnaugh map is correct?

An essential prime implicant is one that:

The AND gate is sometimes called the 'all or nothing' gate because its output is 1 only when:

Which logic family is characterised by almost zero static power dissipation and high noise immunity?

The 2's complement of a binary number is obtained by:

The sum output of a half adder is implemented by which single gate?

The carry-out expression of a full adder is:

A full adder can be constructed from:

The borrow output of a half subtractor computing A minus B is:

Subtraction in a digital processor is normally carried out by:

A multiplexer with 3 select lines can select from how many inputs?

A demultiplexer performs the function of:

A priority encoder differs from an ordinary encoder in that it:

Which device would be used to drive a numeric display on a medical instrument from a four-bit code?

In a multi-channel patient monitor, a single analogue-to-digital converter can serve many channels by using:

Any combinational logic function of three variables can be implemented using:

A magnitude comparator is built principally from which gate?

The principal disadvantage of a ripple carry adder is:

The essential difference between a latch and a flip-flop is that a flip-flop is:

The forbidden or invalid input condition of an SR flip-flop occurs when:

A JK flip-flop with J = 1 and K = 1 will:

The race-around condition occurs in a level-triggered JK flip-flop when:

The characteristic equation of a D flip-flop is:

A T flip-flop is formed from a JK flip-flop by:

How many flip-flops are required to store an eight-bit word?

Which shift register configuration is used at the receiving end of a serial data link to reconstruct a parallel word?

A serial-in serial-out shift register is most commonly used as:

Shifting the contents of a register one position to the left is equivalent to:

A ripple (asynchronous) counter is slower than a synchronous counter because:

How many flip-flops are needed for a decade (mod-10) counter?

A Johnson (twisted-ring) counter built from four flip-flops has how many distinct states?

A memory chip with 12 address lines can address how many locations?

Dynamic RAM must be refreshed periodically because it stores each bit:

Which memory is used for cache because of its speed, despite its higher cost per bit?

An EPROM is erased by:

Which non-volatile memory can be erased electrically, one byte at a time, without removing it from the circuit?

Flash memory differs from EEPROM principally in that flash is erased:

Which type of memory loses its contents when power is removed?

In a PAL (programmable array logic), which array is programmable?

A PLA is more flexible than a PAL because in a PLA:

In a PROM used as a programmable logic device, the AND array is:

Which device would be chosen to implement a complete reconfigurable signal-processing front end for an ultrasound scanner?

An ASIC is preferred to an FPGA in an implantable pacemaker principally because of its:

The principal advantage of using a programmable logic device instead of many discrete gates is:

The standard ASCII code uses how many bits per character?

In asynchronous serial transmission, the start bit is always:

In a standard asynchronous frame, the data bits are transmitted:

Using the 8N1 format, the efficiency of asynchronous transmission is:

Baud rate and bit rate are equal only when:

A parity bit can:

Parity generation and checking is most simply implemented with:

A receiver reports repeated framing errors. The most likely cause is:

Within a UART, the circuit that converts a parallel byte into a serial bit stream is a:

Compared with asynchronous transmission, synchronous transmission offers:

In the RS-232 standard, a logic 1 (mark) is represented by:

Which serial standard uses differential signalling on a twisted pair and supports multiple devices over more than a kilometre?

Data passing from a patient-connected circuit to a mains-powered computer must cross:

The cut-off frequency of a filter is defined as the frequency at which the output falls to:

A fourth-order low-pass filter rolls off at:

Which filter is used to remove baseline wander caused by respiration and electrode movement from an ECG?

The high-pass corner frequency for a diagnostic ECG is standardised at 0.05 Hz rather than 0.5 Hz because a higher corner:

A low-pass filter placed before an analogue-to-digital converter serves as:

The centre frequency of a band-pass filter with cut-offs at 100 Hz and 400 Hz is:

A notch filter used to remove mains interference from an ECG must be narrow because:

The preferred first line of defence against 50 Hz mains interference in a biopotential amplifier is:

FIR digital filters are preferred to IIR filters for ECG processing principally because they:

The band-pass stage of the Pan-Tompkins QRS detection algorithm is centred at approximately:

A wall filter in Doppler ultrasound is:

An ECG monitor set to monitoring mode uses a band of approximately:

Group delay is an important filter specification for biosignals because unequal delay of different frequencies: