Chapter 5 · MCQ Read Mode

Microprocessor, Computer, Organization, and Architecture

The 8085 microprocessor has a data bus width of:

How much memory can the 8085 address with its 16-bit address bus?

The 8086 microprocessor uses a 20-bit address bus, allowing it to address:

Which 8086 functional unit is responsible for fetching instructions and managing the bus?

Which 8085 addressing mode uses a register pair (e.g. HL) to hold the operand's address?

A COM program is limited in size to:

Which tool combines object modules and resolves cross-references into a single executable?

A two-pass assembler builds a symbol table during:

A one-pass assembler resolves forward references using:

Which component loads an executable program into memory and starts its execution?

Which level of the memory hierarchy is the fastest and smallest?

In memory-mapped I/O, I/O devices are accessed using:

The Intel 8255 PPI provides how many programmable 8-bit ports?

Which 8255 mode provides a bidirectional data bus (Port A only)?

Synchronous transmission differs from asynchronous transmission mainly because it:

Which signal pair is used by a DMA controller to request and receive control of the system bus from the CPU?

The main benefit of DMA over programmed data transfer is that it:

In cycle-stealing DMA mode, the DMA controller:

A serial interface transmits data:

RS-232 is an example of a:

Which 8085 interrupt has the highest priority and cannot be masked?

How many entries does the 8086 Interrupt Vector Table contain?

Pseudo-parallelism refers to:

According to Flynn's classification, a GPU applying one instruction across many data elements is an example of:

A traditional single-processor computer belongs to which Flynn class?

Multiple threads of the same process sharing memory is an example of parallelism at which level?

Which of the following is NOT one of the four necessary conditions for deadlock?

A situation where each process in a set waits indefinitely for a resource held by another process in the same set is called:

Which is a typical feature of a modern operating system?

The ISR (Interrupt Service Routine) is executed:

Which control unit design uses fixed combinational logic circuits to generate control signals?

Microprogrammed control stores its control signals as:

Which microinstruction format uses one bit per control signal, requiring little or no decoding?

An instruction format that relies entirely on a stack, with operands implied, is called:

Which addressing mode specifies the operand's memory address directly within the instruction?

RISC architectures are generally characterized by:

Which of the following is a typical CISC characteristic?

Pipelining improves CPU performance mainly by:

A pipeline hazard caused by a branch instruction changing the flow of execution is called a:

Which unit of the CPU performs arithmetic and logical operations on data?

Addition and subtraction in computer arithmetic are typically performed using:

Which algorithm is a classic technique for binary multiplication?

Cache memory improves performance mainly by exploiting:

In which cache mapping scheme can a memory block be placed in any cache line?

Which cache replacement algorithm evicts the block that has not been used for the longest time?

Which write policy updates both the cache and main memory at the same time?

Compared to write-through, write-back is generally:

Which type of memory is non-volatile?

A 'unified' cache refers to a cache that:

'Composing memory' refers to:

Which I/O transfer mode requires the CPU to continuously poll the device's status?

Which I/O mode involves the least CPU involvement during the actual data transfer?

In interrupt-driven I/O, the CPU is notified that a device is ready by:

The main benefit of a multiprocessor system is:

Which interconnection structure connects all processors and memory modules to a single shared communication path?

Which interconnection structure offers the highest performance by connecting every processor to every memory module directly, but at high cost?

A multistage network is best described as:

Processors that do not share memory typically communicate using:

Which of the following is a synchronization primitive used to coordinate access to shared resources?

An I/O module's role includes all of the following EXCEPT:

What condition indicates a circular queue is FULL (size = N, front and rear start at 0)?

Class P problems are solvable in polynomial time by which machine?

The thesis that states any algorithm computable by a person can be computed by a Turing Machine is:

A Finite Automaton (FA) recognises languages described by which grammar type?

The key characteristic of a Universal Turing Machine (UTM) is:

A language is Turing-recognisable (recursively enumerable) if:

A Pushdown Automaton (PDA) that has at most one possible move for any input symbol and stack symbol is called:

The cardinality of the power set of a set with 4 elements, |P(1,2,3,4)|, is:

What grammar notation uses meta-symbols to formally define the syntax of programming languages?