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Chapter 2 ยท MCQ Read Mode

Digital Logic and Microprocessor

AEXE02ยท78 Total MCQs
Question 1 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

The hexadecimal number F is equal to which decimal value?

A10
B12
C14
D15
Answer is hidden
Question 2 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

NAND and NOR gates are called universal gates because:

AThey are the fastest gates
BAny logic function can be built using only one of them
CThey work on both AC and DC
DThey have the lowest power consumption
Answer is hidden
Question 3 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

The 2's complement of a binary number is used in digital systems to represent:

AFloating point numbers
BHexadecimal fractions
CNegative integers
DASCII characters
Answer is hidden
Question 4 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

An XOR gate produces output 1 only when its inputs are:

ABoth 0
BBoth 1
CDifferent from each other
DThe same
Answer is hidden
Question 5 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

How many binary bits does one hexadecimal digit represent?

A4
B8
C2
D3
Answer is hidden
Question 6 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

According to De Morgan's theorem, (A + B)' equals:

AA' + B'
BA ยท B
CA' ยท B'
D(A ยท B)'
Answer is hidden
Question 7 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

A Karnaugh map simplifies Boolean expressions by:

AConverting decimal to binary
BGrouping adjacent 1s in powers of 2
CCounting logic gates
DImplementing flip-flops
Answer is hidden
Question 8 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

The decimal number 13 in binary is:

A1011
B1100
C1010
D1101
Answer is hidden
Question 9 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

An AND gate with inputs A=1 and B=0 produces output:

A1
B0
CUndefined
DDepends on temperature
Answer is hidden
Question 10 of 78Digital Logic: Number Systems, Gates & Boolean Algebra

The 2's complement of the binary number 0110 is:

A1001
B1111
C0110
D1010
Answer is hidden
Question 11 of 78Combinational and Arithmetic Circuits

A 4-to-1 multiplexer requires how many select lines?

A2
B4
C1
D3
Answer is hidden
Question 12 of 78Combinational and Arithmetic Circuits

The Sum output of a half adder is produced by which gate?

AAND
BOR
CXOR
DNAND
Answer is hidden
Question 13 of 78Combinational and Arithmetic Circuits

A 3-to-8 decoder has 3 input lines and ____ output lines.

A3
B6
C8
D24
Answer is hidden
Question 14 of 78Combinational and Arithmetic Circuits

What distinguishes a full adder from a half adder?

AFull adder uses fewer gates
BFull adder accepts a carry-in input
CFull adder works with hexadecimal
DFull adder has only one output
Answer is hidden
Question 15 of 78Combinational and Arithmetic Circuits

The Carry output of a half adder is produced by which gate?

AXOR
BAND
COR
DNOT
Answer is hidden
Question 16 of 78Combinational and Arithmetic Circuits

A demultiplexer routes data from:

AMany inputs to one output
BOne input to one of many outputs
CParallel to serial
DTwo inputs to one output
Answer is hidden
Question 17 of 78Combinational and Arithmetic Circuits

An 8-to-3 encoder has 8 input lines and how many output lines?

A8
B4
C3
D2
Answer is hidden
Question 18 of 78Combinational and Arithmetic Circuits

In hardware, binary subtraction is performed by:

AAdding 1's complement
BDirect subtraction gates
CShifting right
DAdding the 2's complement
Answer is hidden
Question 19 of 78Combinational and Arithmetic Circuits

Combinational circuits differ from sequential circuits in that they have:

AMore inputs
BNo memory โ€” outputs depend only on current inputs
CAlways exactly two outputs
DA clock signal
Answer is hidden
Question 20 of 78Combinational and Arithmetic Circuits

In 2's complement signed numbers, a 1 in the most significant bit (MSB) indicates:

AAn overflow error
BA large positive number
CZero
DA negative number
Answer is hidden
Question 21 of 78Sequential Logic Circuits

Sequential circuits produce outputs that depend on:

ACurrent inputs only
BCurrent inputs AND stored past state
CThe power supply level
DTemperature only
Answer is hidden
Question 22 of 78Sequential Logic Circuits

In an SR flip-flop, which input combination must never be applied?

AS=0, R=1
BS=1, R=0
CS=0, R=0
DS=1, R=1
Answer is hidden
Question 23 of 78Sequential Logic Circuits

A JK flip-flop with J=1 and K=1 applied will:

ASet output to 1
BReset output to 0
CToggle its output
DEnter a forbidden state
Answer is hidden
Question 24 of 78Sequential Logic Circuits

A D flip-flop's output Q on a clock edge will be:

AAlways 1
BEqual to the input D at that moment
CThe complement of D
DWhatever it was before
Answer is hidden
Question 25 of 78Sequential Logic Circuits

A flip-flop differs from a latch in that a flip-flop is:

ASlower
BLevel-triggered
CEdge-triggered
DWithout any clock
Answer is hidden
Question 26 of 78Sequential Logic Circuits

An n-bit binary counter can count how many distinct states?

An
Bnยฒ
C2n
D2โฟ
Answer is hidden
Question 27 of 78Sequential Logic Circuits

In a ripple (asynchronous) counter, each flip-flop is clocked by:

AA common external clock
BThe output of the previous flip-flop
CA separate crystal
DThe input data
Answer is hidden
Question 28 of 78Sequential Logic Circuits

A register stores data using a group of:

ALogic gates only
BDiodes
CDecoders
DFlip-flops sharing a common clock
Answer is hidden
Question 29 of 78Sequential Logic Circuits

Which flip-flop is most commonly used as the basic cell of a synchronous counter?

ASR flip-flop
BD flip-flop
CT (Toggle) flip-flop
DMaster-slave SR
Answer is hidden
Question 30 of 78Sequential Logic Circuits

Synchronous counters are preferred over ripple counters mainly because they are:

ACheaper to build
BSimpler in design
CFaster (no cumulative propagation delay)
DSmaller in size
Answer is hidden
Question 31 of 78Microprocessor: Architecture & Assembly Language

The Program Counter (PC) in a microprocessor holds:

AThe result of the last arithmetic operation
BThe address of the NEXT instruction to be fetched
CThe top of the stack
DThe current interrupt status
Answer is hidden
Question 32 of 78Microprocessor: Architecture & Assembly Language

The address bus in the 8085 microprocessor is:

A8-bit and bidirectional
B8-bit and unidirectional
C16-bit and bidirectional
D16-bit and unidirectional
Answer is hidden
Question 33 of 78Microprocessor: Architecture & Assembly Language

Arithmetic and logic operations in a microprocessor are performed by the:

AALU (Arithmetic Logic Unit)
BProgram Counter
CStack Pointer
DControl bus
Answer is hidden
Question 34 of 78Microprocessor: Architecture & Assembly Language

A microprocessor with 16 address lines can directly address how much memory?

A16 KB
B32 KB
C128 KB
D64 KB
Answer is hidden
Question 35 of 78Microprocessor: Architecture & Assembly Language

Assembly language uses ____ in place of binary machine code.

AMnemonics (e.g., MOV, ADD, JMP)
BHigh-level constructs
CFlowcharts
DHexadecimal only
Answer is hidden
Question 36 of 78Microprocessor: Architecture & Assembly Language

The Intel 8085 is classified as a(n) ____ microprocessor.

A4-bit
B16-bit
C8-bit
D32-bit
Answer is hidden
Question 37 of 78Microprocessor: Architecture & Assembly Language

The Stack Pointer (SP) register points to:

AThe next instruction address
BThe top of the stack in memory
CThe last arithmetic result
DThe interrupt vector table
Answer is hidden
Question 38 of 78Microprocessor: Architecture & Assembly Language

The tool that translates assembly language into machine code is called a(n):

ACompiler
BInterpreter
CLinker
DAssembler
Answer is hidden
Question 39 of 78Microprocessor: Architecture & Assembly Language

After a CALL instruction in 8085, where is the return address saved?

AIn the accumulator
BOn the stack
CIn the flag register
DIn ROM
Answer is hidden
Question 40 of 78Microprocessor: Architecture & Assembly Language

The Zero flag in the 8085 flag register is set when:

AAn overflow occurs
BThe result is negative
CThe result of the last operation is zero
DA carry is generated
Answer is hidden
Question 41 of 78Microprocessor System: Memory, I/O Interfaces & DMA

DRAM requires periodic refreshing because it stores bits as:

AMagnetic domains
BCross-coupled flip-flop states
CCapacitor charges that leak
DOptical patterns
Answer is hidden
Question 42 of 78Microprocessor System: Memory, I/O Interfaces & DMA

DMA is used primarily to:

AIncrease CPU clock speed
BTransfer data between I/O and memory without CPU involvement
CReplace the operating system
DRefresh DRAM
Answer is hidden
Question 43 of 78Microprocessor System: Memory, I/O Interfaces & DMA

Which memory is used for the CPU cache?

ADRAM
BSRAM
CEEPROM
DFlash
Answer is hidden
Question 44 of 78Microprocessor System: Memory, I/O Interfaces & DMA

Asynchronous serial communication uses ____ to frame each transmitted character.

AA shared clock signal
BDMA handshaking
CParity words
DStart bit and stop bit(s)
Answer is hidden
Question 45 of 78Microprocessor System: Memory, I/O Interfaces & DMA

The Intel 8255 PPI provides:

ASerial communication ports
BDMA transfer capability
CThree programmable parallel I/O ports
DInterrupt priority logic
Answer is hidden
Question 46 of 78Microprocessor System: Memory, I/O Interfaces & DMA

Which memory type retains data after the power is switched off?

ANon-volatile memory (ROM, Flash)
BDRAM
CSRAM
DCPU registers
Answer is hidden
Question 47 of 78Microprocessor System: Memory, I/O Interfaces & DMA

Parallel interface is preferred over serial when:

AVery long cable distances are involved
BFewer connector pins are available
CHigh speed transfer over short distances is needed
DLow pin count is critical
Answer is hidden
Question 48 of 78Microprocessor System: Memory, I/O Interfaces & DMA

When a DMA controller takes over the system bus, the CPU:

AContinues executing instructions normally
BResets itself
CHalts or pauses (bus cycle stolen)
DStarts refreshing DRAM
Answer is hidden
Question 49 of 78Microprocessor System: Memory, I/O Interfaces & DMA

The correct order from fastest to slowest in the memory hierarchy is:

ARAM โ†’ Cache โ†’ Registers โ†’ Disk
BCache โ†’ Registers โ†’ RAM โ†’ Disk
CRegisters โ†’ Cache โ†’ RAM โ†’ Disk
DDisk โ†’ RAM โ†’ Cache โ†’ Registers
Answer is hidden
Question 50 of 78Microprocessor System: Memory, I/O Interfaces & DMA

RS-232 is a standard for which type of communication?

AParallel I/O
BSerial communication (asynchronous)
CDMA signalling
DMemory bus protocol
Answer is hidden
Question 51 of 78Interrupt Operations

When an interrupt occurs, the CPU first:

AResets all registers
BImmediately jumps to the ISR
CIgnores all further instructions
DCompletes the current instruction, then saves PC and jumps to ISR
Answer is hidden
Question 52 of 78Interrupt Operations

Interrupts are more efficient than polling because:

AThey use less hardware
BThe CPU only responds when there is actually something to handle
CThey work without a clock
DThey are always faster to implement
Answer is hidden
Question 53 of 78Interrupt Operations

The routine that handles an interrupt is called the:

AInterrupt Service Routine (ISR)
BMain program
CBoot loader
DReset handler
Answer is hidden
Question 54 of 78Interrupt Operations

In the Intel 8085, TRAP has the highest interrupt priority because it is:

AThe only software interrupt
BMaskable and vectored
CNon-maskable and vectored
DThe slowest to respond
Answer is hidden
Question 55 of 78Interrupt Operations

Before jumping to an ISR, the CPU saves the return address by pushing it onto the:

AAccumulator
BFlag register
CData bus
DStack
Answer is hidden
Question 56 of 78Interrupt Operations

A software interrupt in the 8085 is triggered by:

AAn external hardware signal
BA power failure
CAn RST instruction in the program
DA DMA request
Answer is hidden
Question 57 of 78Interrupt Operations

A maskable interrupt can be temporarily disabled by the CPU using:

AA hardware power switch
BA DI (Disable Interrupts) instruction
CRemoving the interrupt source
DResetting the program counter
Answer is hidden
Question 58 of 78Interrupt Operations

In a vectored interrupt system, the address of the ISR is:

ARandomly generated each time
BStored in the accumulator
CFixed and predefined in hardware or a vector table
DSupplied by the interrupting device at runtime
Answer is hidden
Question 59 of 78Interrupt Operations

After the ISR finishes, control returns to the interrupted program using a:

AJMP (Jump) instruction
BRET or RETI (Return) instruction
CHLT (Halt) instruction
DRESET signal
Answer is hidden
Question 60 of 78Interrupt Operations

The correct 8085 interrupt priority order from highest to lowest is:

AINTR > RST5.5 > RST6.5 > RST7.5 > TRAP
BRST7.5 > RST6.5 > RST5.5 > TRAP > INTR
CTRAP > RST7.5 > RST6.5 > RST5.5 > INTR
DTRAP > INTR > RST7.5 > RST6.5 > RST5.5
Answer is hidden
Question 61 of 78Digital Electronics

How many NOT gates are required to build a 2:1 Multiplexer?

A1
B2
C3
D4
Answer is hidden
Question 62 of 78Digital Electronics

How many 2-input NAND gates are contained in a standard 7400 TTL IC?

A2
B3
C4
D8
Answer is hidden
Question 63 of 78Digital Electronics

In TTL logic, what is the input voltage range for a logic LOW (active LOW level)?

A0 V to 0.8 V
B0 V to 1.5 V
C2 V to 5 V
D0.8 V to 2 V
Answer is hidden
Question 64 of 78Digital Electronics

When an invalid BCD code (1010โ€“1111) is detected and auto-corrected, what value is added?

A0110 (6)
B0001 (1)
C1010 (10)
D0100 (4)
Answer is hidden
Question 65 of 78Digital Electronics

What is the terminal (reset) state of a MOD-10 (decade) counter?

A1010
B1001
C1000
D0111
Answer is hidden
Question 66 of 78Digital Electronics

What is the minimum number of flip-flops (memory blocks) required to build a MOD-6 ripple counter?

A2
B3
C4
D6
Answer is hidden
Question 67 of 78Digital Electronics

An SR flip-flop is also called a:

AMonostable multivibrator
BBistable multivibrator
CAstable multivibrator
DSchmitt trigger
Answer is hidden
Question 68 of 78Digital Electronics

A JK flip-flop with J = 1 and K = 1 is clocked at 20 kHz. What is the output waveform and its frequency?

ASine wave at 20 kHz
BSquare wave at 20 kHz
CSine wave at 10 kHz
DSquare wave at 10 kHz
Answer is hidden
Question 69 of 78Digital Electronics

What is the duty cycle of an ideal astable multivibrator?

A25%
B50%
C75%
D100%
Answer is hidden
Question 70 of 78Digital Electronics

Which of the following is NOT a valid operation of flip-flops?

ASet
BReset
CToggle
DMultiply
Answer is hidden
Question 71 of 78Digital Electronics

The TRAP interrupt in 8085 microprocessor is:

AEdge-triggered only
BLevel-triggered (high level)
CMaskable
DSoftware interrupt
Answer is hidden
Question 72 of 78Digital Electronics

Small-Scale Integration (SSI) refers to ICs with how many transistors?

ALess than 10
B10โ€“99
C100โ€“999
D1000+
Answer is hidden
Question 73 of 78Digital Electronics

In VHDL, a signal that represents a bus (multi-bit connection) is declared as:

AVariable
BSignal
CConstant
DGeneric
Answer is hidden
Question 74 of 78Digital Electronics

In VHDL, the primary design unit that represents a hardware block's interface (ports and generics) is called:

AArchitecture
BPackage
CComponent
DEntity
Answer is hidden
Question 75 of 78Digital Electronics

The shadow mask technique is used in:

ALCD panels
BCRT displays
COLED displays
DPlasma screens
Answer is hidden
Question 76 of 78Digital Electronics

Left-shifting an unsigned binary number by 1 bit is equivalent to:

ADividing by 2
BMultiplying by 2
CAdding 1
DSubtracting 1
Answer is hidden
Question 77 of 78Digital Electronics

The expression x << 3 is equivalent to:

Ax ร— 8
Bx ร— 3
Cx + 3
Dx / 8
Answer is hidden
Question 78 of 78Digital Electronics

Which logic gate is commonly used for parity checking and overflow detection?

AAND
BOR
CXOR
DNAND
Answer is hidden
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