Fundamentals of Electronic Devices and Circuits

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This section covers semiconductor fundamentals, PN junction diode characteristics, rectifier circuits, diode types, and the bipolar junction transistor (BJT) — including its configurations and biasing.

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Semiconductors & the PN Junction Semiconductors (silicon, germanium) have conductivity between conductors and insulators; controlled precisely by doping.

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N-type: doped with donor impurities (e.g., Phosphorus) → excess electrons; majority carriers = electrons.

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P-type: doped with acceptor impurities (e.g., Boron) → excess holes; majority carriers = holes.

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A PN junction diode forms when P-type and N-type materials are joined; a depletion region forms at the junction with a built-in barrier potential (≈0.7 V for Si, ≈0.3 V for Ge).

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Forward bias (P to +, N to −): barrier reduced, diode conducts.

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Reverse bias: barrier increased, diode blocks (only a tiny leakage current flows).

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Diode I-V Characteristics & Models Model Description Ideal diode Perfect switch:

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0 Ω (short) when forward biased, infinite Ω (open) when reverse biased, no voltage drop Practical diode Has a forward voltage drop (≈0.7 V Si, ≈0.3 V Ge), finite forward resistance, small reverse saturation current, and reverse breakdown beyond a rated reverse voltage Large-signal model Used for large voltage/current swings (e.g., rectifiers) — diode approximated by threshold voltage + forward resistance Small-signal model Used for small AC signals on a DC bias — diode represented by its dynamic (AC) resistance r_d = 26 mV / I_D at room temperature Diode configurations:

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Series (adds forward drops; raises reverse blocking voltage), Parallel (increases current-handling capacity), Hybrid (combination of both).

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Rectifiers Type Key Features Half-wave 1 diode; conducts only one half-cycle; high ripple; low efficiency (≈40.6%) Full-wave (centre-tap) 2 diodes + centre-tapped transformer; conducts both half-cycles; efficiency ≈81.2% Full-wave (bridge) 4 diodes in bridge arrangement; no centre tap needed; most common; efficiency ≈81.2% Types of Diodes Diode Typical Application Zener diode Voltage regulation (operated in reverse breakdown) LED Light emission (forward biased) Photodiode Light detection (reverse biased) Varactor (varicap) Voltage-variable capacitor (reverse biased) Schottky diode Fast switching, low forward drop (metal-semiconductor junction) Bipolar Junction Transistor (BJT) BJT has three terminals:

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Emitter (E), Base (B), Collector (C); two types:

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It is a current-controlled device: a small base current controls a much larger collector current, I_C = β·I_B (β = current gain, typically 50–300).

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KCL at the transistor:

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Active (BE forward biased, BC reverse biased — normal amplifier action), Saturation (both junctions forward biased — fully ON, used as a switch), Cutoff (both junctions reverse biased — fully OFF).

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BJT Configurations & Characteristics Configuration Current Gain Feature Common Base (CB) α = I_C/Iₑ (<1) High voltage gain, no current gain, high output impedance Common Emitter (CE) β = I_C/I_B (>>1) Highest power gain; most widely used amplifier configuration Common Collector (CC) ≈1 (voltage gain) Emitter follower; high current gain, low output impedance; used as a buffer Input characteristic:

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I_B vs V_BE (fixed V_CE).

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Output characteristic:

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I_C vs V_CE (fixed I_B).

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Current gain characteristic:

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BJT Biasing Purpose: to establish a stable DC operating (quiescent/Q) point in the active region, largely independent of β variation and temperature.

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Fixed (base) bias: simple but poor stability.

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Collector-to-base bias: some stabilization via feedback.

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Voltage-divider (self) bias: most stable and most widely used, thanks to emitter-resistor negative feedback.

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Stability factor S = ΔI_C/ΔI_CO measures how well a biasing scheme resists drift; a lower S is better.

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This section covers field-effect transistors (FETs) — construction, operation and characteristics of JFETs and MOSFETs, MOSFET biasing and its use as an amplifier or switch, and CMOS technology.

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Field Effect Transistor (FET) Overview A FET is a voltage-controlled, unipolar device (conduction by only one type of charge carrier) — unlike the BJT, which is current-controlled and bipolar.

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Gate (G), Drain (D), Source (S); the gate voltage controls current flow from drain to source through an electric field, with essentially no gate current — giving a FET a very high input impedance.

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JFET — Construction & Operation A Junction FET consists of a channel of N-type or P-type semiconductor with a PN junction gate on either side.

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Applying reverse bias V_GS widens the depletion region into the channel, narrowing it and reducing the drain current.

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I_DSS = maximum drain current, at V_GS = 0.

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Vₚ (pinch-off voltage) = the value of V_GS at which the channel is fully depleted (I_D ≈ 0).

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Shockley’s equation:

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I_D = I_DSS·(1 − V_GS/Vₚ)².

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Regions of operation:

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Ohmic/triode (small V_DS, acts as a voltage-controlled resistor), Saturation (constant-current region, used for amplification), Breakdown (V_DS too high).

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MOSFET — Structure, Types & Operation Type Description Enhancement-mode (E- MOSFET) No conducting channel exists at V_GS = 0; a channel is induced only once V_GS exceeds the threshold voltage Vₜ Depletion-mode (D- MOSFET) A conducting channel already exists at V_GS = 0; can operate in both depletion and enhancement modes Structure: metal/poly gate, a thin oxide (SiO₂) insulating layer, and the semiconductor body — the gate is electrically insulated from the channel, giving an extremely high input impedance (essentially zero gate current).

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Both N-channel and P-channel MOSFETs exist (analogous to NPN/PNP BJTs).

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Saturation-region I-V characteristic (E-MOSFET):

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I_D = k·(V_GS − Vₜ)², valid for V_DS ≥ V_GS − Vₜ.

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As an amplifier: biased in the saturation region; a small gate-voltage variation produces an amplified drain current/voltage swing.

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As a switch: toggled between cutoff (OFF, V_GS < Vₜ) and the ohmic/triode region (ON, behaves as a small resistance) — the basis of CMOS digital logic.

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Biasing methods (parallel BJT biasing): gate bias, voltage-divider bias, source-self bias — all used to fix a stable Q-point in the saturation region.

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CMOS — Principle & Applications CMOS (Complementary MOS) pairs an NMOS and a PMOS transistor for every logic function.

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For any steady input, exactly one of the NMOS/PMOS networks conducts, so current flows from supply to ground only momentarily during switching — giving very low static power dissipation.

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Applications: virtually all modern digital ICs (microprocessors, memories, logic gates) due to low power, high noise immunity and high packing density.

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This section covers amplifier fundamentals and gain, the design procedure for low-frequency BJT/MOSFET amplifiers, power amplifier classes, and oscillator/waveform-generator principles.

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Amplification & Gain Amplification increases the magnitude (voltage, current, or power) of a signal without changing its essential waveform.

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Voltage gain A_v = V_out/V_in;

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Current gain A_i = I_out/I_in;

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Power gain Aₚ = A_v × A_i.

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A_v(dB) = 20·log₁₀|A_v|;

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Aₚ(dB) = 10·log₁₀|Aₚ|.

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Voltage amplifiers (e.g., CE/CS stage) provide high voltage gain; current amplifiers (e.g., CC/CD stage) provide high current gain with voltage gain ≈1.

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Designing a Low-Frequency BJT/MOSFET Amplifier Design steps:

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(1) DC biasing — set a stable Q-point in the active/saturation region;

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(2) small-signal (AC) analysis — replace the transistor with its small-signal model;

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(3) compute gain and impedances from that model.

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Key small-signal parameters — BJT: transconductance gₘ = I_C/Vₜ, input resistance r_π = β/gₘ.

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MOSFET: transconductance gₘ = 2I_D/(V_GS−Vₜ).

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Approximate CE-stage voltage gain:

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A_v ≈ −gₘ×R_C (the negative sign indicates 180° phase inversion).

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Negative feedback (output fed back out of phase with the input) improves gain stability, reduces distortion, and increases bandwidth — at the cost of reduced overall gain.

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Power Amplifier Classes Class Conduction & Efficiency Class A Conducts for full 360°; best linearity, LOW efficiency (≈25–50%) Class B Conducts for 180° (half cycle); higher efficiency (≈78.5%); has crossover distortion Class AB Conducts slightly more than 180°; reduces crossover distortion (A/B compromise) Class C Conducts less than 180°; very high efficiency; used in tuned RF power amplifiers Push-pull stages use two devices (one per half-cycle) — common in Class B/AB power amplifiers.

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Oscillators & Waveform Generators An oscillator generates a continuous periodic waveform without an external input signal — it converts DC power to AC.

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Sustained oscillation requires positive feedback and the Barkhausen criterion: loop gain |Aβ| = 1 and total loop phase shift = 0° or 360°.

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Oscillator Feature RC oscillators (Wien bridge, phase-shift) Use R and C; suited to low (audio) frequencies LC oscillators (Hartley, Colpitts) Use an L-C tank; suited to high (RF) frequencies.

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Hartley taps an inductor;

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Colpitts taps a capacitor Crystal oscillator Uses a quartz crystal; best frequency stability & accuracy (clocks, microprocessors) Waveform generators produce non-sinusoidal periodic waves: square-wave (astable multivibrator), triangular-wave (integrating a square wave), and sawtooth-wave generators.

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This section covers the differential amplifier, ideal and practical op-amp characteristics, gain derivations for the basic inverting/non-inverting configurations, and common op-amp applications.

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Differential Amplifier & Op-Amp Basics An operational amplifier (op-amp) is a high-gain differential amplifier with two inputs — inverting (−) and non-inverting (+) — and one output:

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V_out = Aₒₗ·(V+ − V−), where Aₒₗ = open-loop gain (ideally infinite).

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Basic parameters: open-loop gain, input impedance, output impedance, bandwidth, CMRR (common-mode rejection ratio), slew rate.

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Ideal vs Practical Op-Amp Parameter Ideal Practical (typical) Open-loop gain Infinite Very large (10⁵–10⁶) Input impedance Infinite Very high (MΩ to TΩ) Output impedance Zero Low (tens of Ω) Bandwidth Infinite Finite (set by gain-bandwidth product) Input bias current Zero Small but non-zero (nA–μA) Virtual short concept: with negative feedback, an ideal op-amp forces its two input terminals to the same voltage (V+ = V−), even though no current flows into either input.

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Inverting & Non-Inverting Amplifiers Inverting amplifier: input applied to the (−) terminal through R_in, (+) grounded, feedback resistor R_f from output to (−).

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Non-inverting amplifier: input applied directly to the (+) terminal, feedback network R_f & R₁ from output to (−).

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A_v = 1 + R_f/R₁ (always ≥ 1, in phase).

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Voltage follower (buffer): a non-inverting amplifier with R_f = 0, R₁ = ∞ → A_v = 1; gives high input impedance and low output impedance, ideal for isolation/buffering.

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Op-Amp Applications Application Function Integrator Output proportional to the time-integral of the input (uses a feedback capacitor) Differentiator Output proportional to the time-derivative of the input (uses an input capacitor) Adder (summing amp) Output proportional to the (weighted) sum of several inputs Difference amplifier Output proportional to the difference of two inputs Clipper / Limiter Clips (limits) the output beyond a set voltage level Comparator Output switches between saturation levels depending on which input is larger

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This section covers nonlinear op-amp circuits (logarithmic/exponential amplifiers, the phase-locked loop, voltage-to-frequency conversion) and active filter fundamentals.

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Logarithmic & Exponential Amplifiers A logarithmic (log) amplifier produces an output proportional to the logarithm of the input, exploiting the exponential I-V relationship of a diode or BJT placed in the op-amp’s feedback path.

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An exponential (antilog) amplifier does the reverse — output ∝ e^(input) — obtained by placing the diode/BJT in the input path instead.

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A logarithmic multiplier multiplies two signals by adding their logarithms (via log amps) and then taking the antilog of the sum: log(A) + log(B) = log(A×B).

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Phase-Locked Loop (PLL) & Frequency Conversion A PLL is a feedback control system that locks the phase (and hence frequency) of a local oscillator to an input reference signal.

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Main blocks: phase detector → low-pass filter → voltage-controlled oscillator (VCO).

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Applications: frequency synthesis, FM demodulation, clock recovery, frequency multiplication.

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Voltage-to-frequency (V/F) converter: output pulse frequency proportional to the input voltage.

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Frequency-to-voltage (F/V) converter: output DC voltage proportional to the input frequency — the reverse operation.

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Active Filters An active filter uses an amplifying element (op-amp) with R and C to shape the frequency response — unlike a passive filter, it can provide gain and needs no inductors.

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Advantages over passive filters: provides signal gain, avoids bulky/lossy inductors, offers high input impedance and low output impedance (good for cascading), and is easily tunable.

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Active first-order low-pass filter: passes frequencies below cutoff f_c = 1/(2πRC); attenuates above it at −20 dB/decade.

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Active first-order high-pass filter: passes frequencies above f_c; attenuates below it.

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This section covers the evolution and classification of digital logic families, their key performance characteristics, and simple gate implementations using DTL, RTL and TTL technology.

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Evolution & Classification of Logic Families Logic families evolved from discrete components toward integrated circuits:

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RTL (Resistor-Transistor Logic) → DTL (Diode-Transistor Logic) → TTL (Transistor-Transistor Logic) → ECL (Emitter-Coupled Logic) → MOS/CMOS.

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Broadly classified as bipolar (RTL, DTL, TTL, ECL — built from BJTs) and unipolar/MOS (PMOS, NMOS, CMOS — built from FETs).

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Key Characteristics of Logic Families Characteristic Meaning Fan-in Maximum number of inputs a gate can accept Fan-out Maximum number of similar gate inputs one output can reliably drive Propagation delay Time taken for the output to respond to an input change Noise margin Maximum noise voltage tolerated without causing a false output Power dissipation Power consumed by the gate (static + dynamic) Speed-power product Figure of merit = propagation delay × power dissipation (lower is better) DTL, RTL & TTL Gate Circuits Family Basic Structure Notes RTL Resistors set fan-in, a transistor provides inversion Earliest IC logic; poor noise margin and fan-out; now obsolete DTL Diodes perform the logic (AND/OR), a transistor provides inversion/amplification Improved noise margin over RTL; predecessor to TTL TTL A multi-emitter transistor performs the logic; totem-pole output stage Fast, good noise margin; dominant logic family for decades (74-series ICs) In TTL, the characteristic multi-emitter input transistor directly replaces the input diodes of DTL, improving switching speed.

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Modern digital ICs predominantly use CMOS technology (Section 2.2) for its very low static power dissipation and high packing density, though TTL-compatible CMOS families (e.g., 74HCT) remain common for interfacing.